What Can a Remote Access Hardware Trojan do to a Network-on-Clip?

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Start Date

5-1-2023 10:40 AM

End Date

5-1-2023 11:30 AM

Description

Interconnection networks such as Network-on-Chips (NoCs) for multi/manycore processors are critical infrastructure of the system as they enable data communication among the processing cores, caches, memory, and other peripherals. Given the criticality of the interconnects, the system can be severely subverted if the interconnection is compromised. The threat of Hardware Trojans (HTs) penetrating complex hardware systems such as multi/many-core processors is increasing due to the increasing presence of third-party players in a System-on-chip (SoC) design. Even by deploying naïve HTs, an adversary can exploit the NoC backbone of the processor and get access to communication patterns in the system. This presentation discusses the design of an HT embedded in the NoC router that can leak sensitive information regarding traffic patterns to an external malicious attacker; who, in turn, can analyze the HT payload data with advanced algorithms such as machine learning to infer the applications running on the processor or reverse engineer architectural Intellectual Property (IP) of the system. This presentation also entertains the idea of using a routing obfuscation technique to achieve a trade-off between defense against HTs and performance penalties.

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Jan 5th, 10:40 AM Jan 5th, 11:30 AM

What Can a Remote Access Hardware Trojan do to a Network-on-Clip?

Interconnection networks such as Network-on-Chips (NoCs) for multi/manycore processors are critical infrastructure of the system as they enable data communication among the processing cores, caches, memory, and other peripherals. Given the criticality of the interconnects, the system can be severely subverted if the interconnection is compromised. The threat of Hardware Trojans (HTs) penetrating complex hardware systems such as multi/many-core processors is increasing due to the increasing presence of third-party players in a System-on-chip (SoC) design. Even by deploying naïve HTs, an adversary can exploit the NoC backbone of the processor and get access to communication patterns in the system. This presentation discusses the design of an HT embedded in the NoC router that can leak sensitive information regarding traffic patterns to an external malicious attacker; who, in turn, can analyze the HT payload data with advanced algorithms such as machine learning to infer the applications running on the processor or reverse engineer architectural Intellectual Property (IP) of the system. This presentation also entertains the idea of using a routing obfuscation technique to achieve a trade-off between defense against HTs and performance penalties.